may 2011 FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 1 www.fairchildsemi.com FDMS86102LZ rev.c FDMS86102LZ n-channel power trench ? mosfet 100 v, 22 a, 25 m features ? max r ds(on) = 25 m at v gs = 10 v, i d = 7 a ? max r ds(on) = 37 m at v gs = 4.5 v, i d = 5.8 a ? hbm esd protection level > 6 kv typical (note 4) ? 100% uil tested ? rohs compliant general description this n-channel logic level mosfets are produced using fairchild semiconductor' s advanced power trench ? process that has been special tailored to minimize the on-state resistance and yet maintain superior switching performance. g-s zener has been added to enhance esd voltage level. applications ? dc - dc conversion ? inverter ? synchronous rectifier g s s s d d d d 5 6 7 8 4 3 2 1 power 56 d d d d g s s s pin 1 bottom top mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 100 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 22 a -continuous (silicon limited) t c = 25 c 37 -continuous t a = 25 c (note 1a) 7 -pulsed 40 e as single pulse avalanche energy (note 3) 84 mj p d power dissipation t c = 25 c 69 w power dissipation t a = 25 c (note 1a) 2.5 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 1.8 c/w r ja thermal resistance, junction to ambient (note 1a) 50 device marking device package reel size tape width quantity fdms86102z FDMS86102LZ power 56 13 ?? 12 mm 3000 units
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 2 www.fairchildsemi.com FDMS86102LZ rev. c electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 100 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 70 mv/c i dss zero gate voltage drain current v ds = 80 v, v gs = 0 v 1 p a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 10 p a v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.0 1.5 2.5 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -6 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 7 a 18.6 25 m : v gs = 4.5 v, i d = 5.8 a 23.5 37 v gs = 10 v, i d = 7 a, t j = 125 c 31.2 42 g fs forward transconductance v ds = 5 v, i d = 7 a 26 s c iss input capacitance v ds = 50 v, v gs = 0 v, f = 1 mhz 979 1305 pf c oss output capacitance 175 235 pf c rss reverse transfer capacitance 8.9 15 pf r g gate resistance 0.9 : t d(on) turn-on delay time v dd = 50 v, i d = 7 a, v gs = 10 v, r gen = 6 : 6.7 14 ns t r rise time 2.6 10 ns t d(off) turn-off delay time 19 35 ns t f fall time 2.5 10 ns q g(tot) total gate charge v gs = 0 v to 10 v v dd = 50 v, i d = 7 a 16 22 nc q g(tot) total gate charge v gs = 0 v to 4.5 v 7.8 11 nc q gs total gate charge 2.4 nc q gd gate to drain ?miller? charge 2.6 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 7 a (note 2) 0.81 1.3 v v gs = 0 v, i s = 2 a (note 2) 0.72 1.2 t rr reverse recovery time i f = 7 a, di/dt = 100 a/ p s 35 57 ns q rr reverse recovery charge 25 40 nc notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 300 p s, duty cycle < 2.0%. 3. starting t j = 25 c; n-ch: l = 1 mh, i as = 13 a, v dd = 90 v, v gs = 10 v. 4. the diode connected between gate and source serves only as protection against esd. no gate overvoltage rating is implied. 50 c/w when mounted on a 1 in 2 pad of 2 oz copper a. 125 c/w when mounted on a minimum pad of 2 oz copper b.
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 3 www.fairchildsemi.com FDMS86102LZ rev. c typical characteristics t j = 25 c unless otherwise noted figure 1. 012345 0 10 20 30 40 v gs = 3.5 v v gs = 2.5 v pulse duration = 80 s duty cycle = 0.5% max v gs = 3 v v gs = 4.5 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 10203040 0 1 2 3 4 5 6 v gs = 3 v v gs = 2.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 3.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 i d = 7 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 20 40 60 80 100 t j = 125 o c i d = 7 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 10 20 30 40 t j = 150 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 40 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 4 www.fairchildsemi.com FDMS86102LZ rev. c figure 7. 0 4 8 12 16 0 2 4 6 8 10 i d = 7 a v dd = 25 v v dd = 50 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 75 v gate charge characteristics figure 8. 0.1 1 10 100 1 10 100 1000 5000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.001 0.01 0.1 1 10 20 1 10 50 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 8 16 24 32 40 limited by package v gs = 4.5 v r jc = 1.8 o c/w v gs = 10 v i d , drain current (a) t c , c ase temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . g a t e l e a k a g e c u r r e n t v s gate to source voltage 0 4 8 121620242832 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 v ds = 0 v t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) i g , gate leakage current (a) figure 12. 0.01 0.1 1 10 100 500 0.005 0.01 0.1 1 10 50 10 s 100 us 10 ms dc 1 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r ja = 125 o c/w t a = 25 o c f o r w a r d b i a s s a f e operating area typical characteristics t j = 25 c unless otherwise noted
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 5 www.fairchildsemi.com FDMS86102LZ rev. c figure 13. single pulse maximum power dissipation 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.5 1 10 100 1000 p (pk) , peak transient power (w) single pulse r ja = 125 o c/w t a = 25 o c t, pulse width (sec) figure 14. 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 2 single pulse r ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 6 www.fairchildsemi.com FDMS86102LZ rev. c dimensional outline and pad layout
FDMS86102LZ n-channel power trench ? mosfet ?2011 fairchild semiconductor corporation 7 www.fairchildsemi.com FDMS86102LZ rev.c anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy. fairchild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in th e industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts ex perience many problems such as loss of brand reputation, substa ndard performance, failed application, and increased cost of production and manufacturing dela ys. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above . products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fairchild?s quality standards for handing and storage and provide access to fairchild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. fairchild is committed to combat this global problem and encourage our customer s to do their part in stopping th is practice by buying direct or from authorized distributors. ? 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